We are looking for a highly motivated PhD candidate to join the TIRAMISU project (Training and Innovation in Reliable and Efficient Chip Design for Edge AI, https://tiramisu-project.eu/).
The research will focus on the functional safety aspects of AI accelerators, aligned with ISO 26262 standards and utilizing state-of-the-art EDA tools. The PhD work will involve identifying safety-critical components of AI accelerators and developing advanced safety analysis methodologies.
The goal is to develop safety mechanisms and optimize safety verification techniques, including simulation-based fault injection and formal verification, to enhance the safety of AI hardware. These methods will be integrated into Cadence’s functional safety toolchain, contributing to a novel methodology that improves safety verification processes and accelerates time-to-market for AI accelerators.
Required qualifications:
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Benefits we offer you:
And so much more, do not hesitate to contact us.