

Analog and Mixed-Signal IC Design Engineer Intern
Location
Fremont, CA
Level
Senior
Department
Engineering
Type
Full - Time
Salary
Job Description
Posted on:
October 6, 2023
We are looking for Analog and Mixed-Signal IC Design Engineer Interns who are interested in architecting and implementing innovative solutions with high energy-efficiency and compact silicon footprint and who thrive with the autonomy to propose creative approaches to problems.
Responsibilities
The Analog and Mixed-Signal IC Design Engineer Intern will be responsible for analog and mixed-signal chip design, from circuit design to layout and verification.
- Define and implement innovative and optimal analog and mixed signal circuit architectures and transistor-level circuit solutions to achieve a variety of challenging noise, mismatch, distortion, power consumption, and cost requirements.
- Defines verification plan for a portion of IP or chip and runs complex simulations and analyses (e.g., power, performance, linearity, yield) on designs.
- Designs, programs, and runs complex tests and reviews tests of other team members; ensures bugs and other issues are identified and appropriately analyzed.
Job Requirements
- Minimum 1 years of experience in analog/mixed-signal integrated CMOS circuit design for a specific area (e.g., delta-sigma ADC, SAR ADC, DAC, VCO, PLL, DLL, Audio CODEC and Class D audio amplifier, high speed PHY & SERDES) with a successful track record of silicon validation.
- Minimum 3 months experience of application of technical skills outside of the classroom (examples: laboratory, research, extracurricular project teams, open source contributions, volunteering, personal projects or prior internship/work experience)
- The ideal candidates are people who get excited about building things, are highly analytical, and enjoy tackling new problems regularly.
Preferred qualifications:
- Skills in scripting and automation for complex simulation scenarios.
- Experience in lab testing of high-precision analog and mixed-signal ICs.
- Functional modeling experience and logic verification with Verilog AMS and SystemVerilog.
- Experience in design and layout with advanced CMOS FinFET technologies.
- Experience with design for high-volume production.